Notes:RealQ Architecture/1-Byte operations
From Maths
Operation | bits | Comment | Caveats | |||||||
---|---|---|---|---|---|---|---|---|---|---|
LOAD r1,r2 | 00 | sr2 | r1 | r2 | r1 must be 16bit, sr2=11 is unused | |||||
(Unused) | 00 | 11 | xx | xx | ||||||
MOV r1,r2 | 01 | sr | r1 | r2 | registers must have same size-code[N 1] | |||||
SWP r | 01 | 11 | 00 | rr | ||||||
INC | 01 | 11 | 01 | 00 | Only affects the A register | |||||
INC2 | 01 | 11 | 01 | 01 | Only affects the A register | |||||
DEC | 01 | 11 | 01 | 10 | Only affects the A register | |||||
DEC2 | 01 | 11 | 01 | 11 | Only affects the A register | |||||
(Unused) | 01 | 11 | 1 | x | xx |
Opcode notes
- ↑ That is must both be 16bit, low or high