Notes:RealQ Architecture/1-Byte operations

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Operation bits Comment Caveats
LOAD r1,r2 00 r1 r2 sr2 r1 must be 16bit, sr2=11 is unused.
MOV r1,r2 01 r1 r2 sr registers must have same size-code[N 1]
01 xx xx 11 (see: SWP)


Opcode notes

  1. ↑ That is must both be 16bit, low or high
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